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讲座信息:Design for Manufacturability for Sub-10nm Designs

题  目:Design for Manufacturability for Sub-10nm Designs
报告人:Yao-Wen Chang (National Taiwan University)
时  间:2015年7月8日(周三)上午10:00-11:30
地  点:张江校区微电子楼389室

 

Abstract
As process nodes continue to shrink, the semiconductor industry faces severe manufacturing challenges. Four most expected technologies may push the limits of lithography: multiple patterning lithography, extreme ultraviolet lithography, electron beam lithography, and directed self-assembly.    We investigate the most critical design challenges of the four technologies and provide our solutions, which can contribute to the continuing scaling of the CMOS technology.    Finally, we provide some future research directions for the addressed technologies.

 

Biography
Yao-Wen Chang received the B.S. degree from National Taiwan University in 1988, and the M.S.  and Ph.D. degrees from the University of Texas at Austin in 1993 and 1996, respectively, all in computer science.    He is currently the MXIC Chair Professor of the Dept. of Electrical Engineering and Associate Dean of the EECS College, National Taiwan University.    His current research interests lie in electronic design automation (EDA) and manufacturability.    He has coauthored one textbook on electronic design automation (EDA) and one book on routing and over 250 ACM/IEEE conference/journal papers, including highly cited papers on floorplanning, placement, routing, and FPGA switch module design.    Dr. Chang has received many research/teaching awards, including four awards at the 50th ACM/IEEE Design Automation Conference (DAC) in 2013 (e.g., the 1st Most Papers in the Fifth Decade [34 papers; #1 worldwide], etc.), the sole six 1st places of recent ACM/IEEE EDA contests on circuit placement, clock network synthesis, gate sizing, and timing analysis, and six best paper awards and 22 best paper nominations in the past decade.  Dr. Chang is currently the Vice President of Technical Activities of the IEEE Council on EDA (CEDA) and the past chair of IEEE/ACM ICCAD.  He has served on the editorial boards of IEEE TCAD, IEEE TVLSI, IEEE D&T, etc. and on the program committees of all important EDA conferences, and as program / general / steering committee chairs of ISPD and program chairs of ASP-DAC, ICCAD, and FPT.  He has also served as an independent board director of Genesys Logic, and a technical consultant of Faraday, MediaTek, and RealTek.    Dr. Chang is a co-founder of the Maxeda Design Technology.    He is an IEEE Fellow.

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