| 专用集成电路与系统国家重点实验室
讲座信息 Topic: Semiconductor device compact modeling
Speaker: Dr. Kejun Xia (NXP semiconductor)
Time: 10:00-11:00am, Wed, 29th June 2016
Location: 邯郸校区微电子楼B213会议室 Abstract
Semiconductor device compact models are the key components in PDK to enable integrated circuit design for a given technology. To shorten the design cycle, there is pressing needs of more accurate yet computationally efficient compact models. In this talk, we briefly review the integration technologies and introduce BCD technology. Nowadays, BCD has been the key platform to power up all mobile devices, and it has been used in the fields of automotive, healthcare, industry, etc. After giving the device modeling hierarchy, we review the compact models used by the industry for all major types of devices including CMOS, LDMOS, JFET, BJT. We discuss the modeling issues we have found. We summarize the significant contributions from NXP in the field of compact modeling. Lastly, we will introduce our R&D center in Beijing and recruiting information. Biography
Dr. Kejun Xia （夏科骏） received the Ph.D. degree in Electrical Engineering at Auburn University in Dec. 2006. After graduation, he joined Maxim Integrated R&D department, where he served as a Senior Principal Member of Technical Staff leading the modeling activities for the advanced BCD & SiGe BiCMOS technologies. From 2014 to 2015, he was with the Analog & Sensor BU at Freescale Semiconductor as a modeling manager, where he expanded his experience to modeling ESD, Reliability, MEMS, product behavior model, etc. The technologies for which he is responsible are the base for Freescale’s highly successful Auto IC business. Since 2016, he joined NXP semiconductor as a modeling manager, where he is also responsible for certain fab transfer projects. Over the years, he has managed the teams in many countries including US, France, India, and China.
Dr. Xia’s research interests include device physics; compact modeling; model and its interaction with analog circuits. He is a senior member of IEEE. He has published more than 20 technical papers in renowned journals and conferences. He has been a frequent reviewer for IEEE Transactions on Electron Devices, IEEE Electron Device Letters, and Solid-state electronics. Recent publications:
[1] K. Xia, C. McAndrew, and B. Grote, “Dual-gate JFET modeling II: Source pinchoff voltage and complete Ids modeling formalism” in IEEE Trans. Electron Devices, Vol. 63, No. 4, pp. 1416-1422, Apr. 2016.
[2] K. Xia, C. McAndrew, and B. Grote, “Dual-gate JFET modeling I: Generalization to include MOS gates and efficient method to calculate drain-source saturation voltage” in IEEE Trans. Electron Devices, Vol. 63, No. 4, pp. 1408-1415, Apr. 2016.
[3] K. Xia, and G. Niu, “Effect of boundary conditions on thermal noise of intrinsic terminal currents in bipolar transistors pertinent to quasi-ballistic transport” in IEEE Trans. Electron Devices, Vol. 60, No. 12, pp. 4226-4233, Dec. 2013.
[4] K. Xia, G. Niu, and Z. Xu, “A new approach to implementing high-frequency correlated noise for bipolar transistor compact modeling” in IEEE Trans. Electron Devices, Vol. 59, No. 2, pp. 302-308, Feb. 2012. 联系人：徐鸿涛 |