专用集成电路与系统国家重点实验室
讲座信息

Abstract:
This talk presents extending the theories of error-correcting codes to achieve high-performance hyper-scale distributed storage, and paradigm-shifting security primitives.

Reliable and fast distributed storage is the backbone of high-performance computing, big data analytics, and many other pervasive applications. Locally recoverable (LRC) erasure codes are a key enabler for the continued scaling of distributed storage since they have much shorter latency and lower network traffic overhead compared to traditional failure recovery approaches. This talk first introduces our recent results on LRC codes that are flexible on code parameters, achieve easy redundancy-locality tradeoff, and allow unequal protection over heterogeneous drives. Then discussions are given to a few topics for improving the performance of next-generation storage systems, such as storage class memories and in-memory computing.

The second part of this talk focuses on cryptography and security. Authentication using biometrics enjoys many advantages. However, to secure the storage of biometric templates, encryption schemes must be married to error-correcting codes to handle the natural fuzziness of biometric samples. Low-complexity fuzzy vault biometric encryption engines developed through modifying the algebraic interpolation process for soft-decision Reed-Solomon decoding are presented. Moreover, the extensions of error-correcting codes to post-quantum McEliece cryptosystem and private information retrieval from distributed storage are briefly discussed.

Bio:
Xinmiao Zhang received her Ph.D. degree in Electrical Engineering from the University of Minnesota, Twin Cities. She was a Timothy E. and Allison L. Schroeder Assistant Professor 2005-2010 and tenured Associate Professor 2010-2013 at Case Western Reserve University. She has been with Western Digital/ SanDisk 2013-2017, and joined The Ohio State University in 2017 as a tenured Associate Professor. She also held visiting positions at the University of Washington, Seattle, 2011-2013 and Qualcomm in 2008. Dr. Zhang’s research spans the areas of VLSI architecture design, digital storage and communications, security, and signal processing.

Dr. Zhang received an NSF CAREER Award in January 2009. She is also the recipient of the Best Paper Award at 2004 ACM Great Lakes Symposium on VLSI and 2016 International SanDisk Technology Conference. She developed many architectures to improve the hardware efficiency of state-of-the-art error-correcting codes, including hard- and soft-decision BCH and Reed-Solomon codes, binary and non-binary low-density parity-check codes, and authored the book “VLSI Architectures for Modern Error-Correcting Codes” (CRC 2015). Her work on the Advanced Encryption Standard (AES) received 700 citations. She is also a co-editor of the book “Wireless Security and Cryptography: Specifications and Implementations” (CRC 2007) and a guest editor for the Springer MONET Journal Special Issue on “Next Generation Hardware Architectures for Secure Mobile Computing”.

Dr. Zhang is a member of the IEEE Circuits and Systems for Communications (CASCOM), VLSI System Applications (VSA), Design and Implementation of Signal Processing Systems (DISPS), and Data Storage (DSTC) technical committees. She is also the Vice-Chair from Industry of the DSTC 2017-2018. She has served on the committees of many conferences, including ISCAS, ICASSP, GLOBECOM, GlobalSIP, SiPS, ICC, and NVMW, and will be the Chair of the Data Storage Track of ICC 2019. Dr. Zhang was the Chair of the Seasonal Schools Program of the IEEE Signal Processing Society 2013-2015. She has been an associate editor for the IEEE Transactions on Circuits and Systems-I since 2010, and was a recipient of the Best Associate Editor Award in 2013.